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CMSIS-DAP
Version 1.00 - Preview
CMSIS-DAP support for Cortex-M processor-based devices
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Macros | |
| #define | DAP_VENDOR "ARM" |
| < DAP Hardware Device Header File | |
| #define | DAP_PRODUCT "CMSIS-DAP" |
| Identification String of the CMSIS-DAP Hardware. | |
| #define | DAP_SER_NUM "00000000" |
| Serial Number of the CMSIS-DAP Hardware. | |
| #define | DAP_FW_VER "1.00" |
| Serial Number of the CMSIS-DAP Hardware. | |
| #define | DAP_PACKET_SIZE 1024 |
| Maximum Request/Response packet size. | |
| #define | DAP_PACKET_COUNT 4 |
| Maximum number of buffered packets. | |
| #define | DAP_SWD 1 |
| SWD Port available. | |
| #define | DAP_JTAG 1 |
| JTAG Port available. | |
| #define | DAP_JTAG_DEV_CNT 8 |
| Maximum number of JTAG devices. | |
| #define | CPU_CLOCK 100000000 |
| Specifies the CPU Clock of the Cortex-M. | |
| #define | IO_PORT_WRITE_CYCLES 2 |
| Number of cycles for I/O Port Write. | |
| #define DAP_VENDOR "ARM" |
< DAP Hardware Device Header File
Vendor of the CMSIS-DAP Hardware